IBM and Lam Research have entered into a five‑year partnership to develop new processes and materials that will enable sub‑1 nm logic scaling. The collaboration will focus on advanced etch and deposition capabilities, High‑NA EUV lithography, and new materials for nanosheet and nanostack devices, as well as backside power delivery to free front‑side interconnect space.
The partnership builds on a decade‑long relationship that helped bring 7 nm, nanosheet, and the first 2 nm node to market. IBM’s research at the NY Creates Albany NanoTech Complex will be combined with Lam’s end‑to‑end process tools to create full process flows that support higher‑performance, lower‑power transistors for AI workloads.
For IBM, the collaboration strengthens its semiconductor roadmap and positions the company to compete in high‑performance computing, especially for AI workloads. For Lam, the partnership provides access to IBM’s advanced research capabilities and potential commercial applications for its lithography and packaging technologies, reinforcing Lam’s role in the AI‑driven semiconductor ecosystem.
"Lam has been a critical partner to IBM for over a decade, contributing to key breakthroughs in logic scaling and device architecture such as nanosheet and the world's first 2 nm node chip, unveiled by IBM in 2021. We are thrilled to be expanding our collaboration to tackle the next set of challenges to enable High‑NA EUV lithography and sub‑1 nm nodes." – Mukesh Khare, GM of IBM Semiconductors and VP of Hybrid Cloud, IBM Research
"As the industry enters a new era of 3D scaling, progress depends on rethinking how materials, processes, and lithography come together as a single, high‑density system. We are proud to build on our successful collaboration with IBM to drive High‑NA EUV dry resist and process breakthroughs, accelerating the development of lower power and higher performance transistors that will be critical for AI era." – Vahid Vahedi, Chief Technology and Sustainability Officer, Lam Research
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